INSIGHT

Integration of III-V Nanowire Semiconductors for next
Generation High Performance CMOS SOC TECHNOLOGIES

Publications

 

  1. S. Andric, L. Ohlsson, L-E Wernersson, "Low-Temperature Front-Side BEOL Technology with Circuit Level Multiline Thru-Reflect-Line Kit for III-V MOSFETs on Silicon", ARFTG 2019 (2019)

    (Partners involved: ULUND) Open access pending

  2. C. Convertino, C. Zota, H. Schmid, D. Caimi, M. Sousa, K. Moselund, L. Czornomaz, "InGaAs FinFETs Directly Integrated on Silicon by Selective Growth in Oxide Cavities", Materials, vol 12, p87 (2019)

    (Partners involved: IBM) Open access

  3. M. Borg, L. Gignac, J. Bruley, A. Malmgren, S. Sant, C. Convertino, M.D. Rossell, M. Sousa, C. Breslin, H. Riel, K.E. Moselund, H. Schmid, ”Facet-selective group-III incorporation in InGaAs Template Assisted Selective Epitaxy”, Nanotechnology 30, 8, 084004 (2019)

    (Partners involved: Lund University, IBM) Open access

  4. O-P Kilpi, J. Svensson, E Lind, L-E Wernersson, ”Electrical properties of Vertical InAs/InGaAs Heterostructure MOSFETs”, J. Electron Dev. Soc. 2018

    (Partners involved: Lund University) Open access

  5. P. Ferrandis, M. Billaud, J. Duvernay, M, Martin, A. Arnoult, H. Grampeix, M. Casse, H. Boutry, T. Baron, M. Vinet, G. Reimbold, "Electrical properties of metal/Al2O3/In0.53Ga0.47As capacitors grown on InP", J. Appl. Phys. 123, 16, 161534 (2018)

    (Partners involved: LETI) Open access pending

  6. E. Caruso, J. Lin, K. F. Burke, K. Cherkaoui, D. Esseni, F. Gity, S. Monaghan, P. Palestri, P. Hurley, L. Selmi, ”Profiling Border-Traps by TCAD analysis of Multifrequency CV-curves in Al2O3/InGaAs stacks”, 2018 IEEE EUROSOI-ULIS (2018)

    (Partners involved: Tyndall) Open access

  7. C.B. Zota, C. Convertino, Y. Baumgartner, M. Sousa, D. Caimi, L. Czornomaz, "High Performance Quantum Well InGaAs-On-Si MOSFETs With sub-20 nm Gate Length For RF Applications", IEEE Internat. Electron Dev Meeting 2018, 39.4 (2018)

    (Partners involved: IBM) Open access pending

  8. A. Jönsson, J. Svensson, L-E Wernersson, "Balanced Drive Currents in 10-20 nm Diameter Nanowire All-III-V CMOS on Si", IEEE Internat. Electron Dev Meeting 2018, 39.3 (2018)

    (Partners involved: ULUND) Open access pending

  9. C. Convertino, C. Zota, S. Sant, F. Eltes, M. Sousa, D. Caimi, A. Schenk, L. Czornomaz, "InGaAs-on-Insulator FinFETs with Reduced Off-Current and Record Performance", IEEE Internat. Electron Dev Meeting 2018, 39.2 (2018)

    (Partners involved: IBM) Open access pending

  10. A. Tessmann, A. Leuther, F. Heinz, F. Bernhardt, H. Massler, “High Gain 220 - 275 GHz Amplifier MMICs based on metamorphic 20 nm InGaAs MOSFET Technology”, 2018 IEEE BiCMOS Comp. Semicond. Integr. Circ. Techn. Symp. (2018)

    (Partners involved: IAF) Open access

  11. C. Convertino, C.B. Zota, D. Caimi, M. Sousa, L. Czornomaz "InGaAs FinFETs 3D sequentially Integrated on FDSOI Si CMOS with Record performance", 48th ESSDERC (2018)
    doi: 10.1109/ESSDERC.2018.8486862

    (Partners involved: IBM) Open access pending

  12. A. Jönsson, J. Svensson, L-E Wernersson, "A Self-aligned Gate-last process applied to all-III-V CMOS on Si", IEEE Electron Dev. Lett. vol 39, p. 935 (2018) doi: 10.1109/LED.2018.2837676

    (Partners involved: Lund University) Open access

  13. C. Zota, C. Convertino, V. Deshpande, T. Merkle, M. Sousa, D. Caimi, L. Czornomaz, "InGaAs-on-Insulator MOSFETs Featuring Scaled Logic Devices and Record RF performance", 2018 IEEE Symp. VLSI Techn. T15-5 (2018)

    (Partners involved: IBM, IAF) Open access pending

  14. J. Lin, S. Monaghan, K. Cherkaoui, IM. Povey, B. Sheehan, PK Hurley, "Examining the relationship between capacitance-voltage hysteresis and accumulation frequency dispersion in InGaAs metal-oxide-semiconductor structures based on the response to post-metal annealing", Microelectr. Eng. 178, 204-208 (2017)

    Partners involved: T-UCC) Open access pending

  15. V. Deshpande, H. Hahn, E. O'Connor, Y. Baumgartner, D. Caimi, M. Sousa, H. Boutry, J. Widiez, L. Brevard, C. Le Royer, M. Vinet, J. Fompeyrine, L. Czornomaz, "Demonstration of 3-D SRAM Cell by 3-D Monolithic Integration of InGaAs n-FinFETs on FDSOI CMOS With Interlayer Contacts", IEEE Trans. Electron Dev. 64, 11, 4503-4509 (2017)

    (Partners involved: IBM, LETI) Open access pending

  16. O-P Kilpi, J. Wu, J. Svensson, E. Lind, L.-E. Wernersson, "Vertical Heterojunction InAs/InGaAs Nanowire MOSFETs on Si with Ion = 330 µA/µm at Ioff = 100 nA/µm and VD = 0.5 V", IEEE. 2017 Symp. VLSI Techn. (2017)

    (Partners involved: ULUND) Open access pending

  17. L-E Wernersson, "Integration of III-V Nanowires for the next RF- and logic technology generation", IEEE VLSI-TSA 2017

    (Partners involved: ULUND) Open access

  18. L-E Wernersson, "Properties of III-V Nanowires: MOSFETs and TunnelFETs", EuroSOI-ULIS 2017 (2017)

    (Partners involved: ULUND)  Open access pending

  19. Olli-Pekka Kilpi, Johannes Svensson, Axel R. Persson, Reine Wallenberg, Erik Lind, Lars-Erik Wernersson, "Vertical InAs/InGaAs Heterostructure MOSFETs on Si", Nano Lett. 17, 10 6006-6010 (2017)

    (Partners involved: ULUND)  Open access pending

  20. V. Deshpande, V. Djara, E. O’Connor, D. Caimi, M. Sousa, L. Czornomaz and J. Fompeyrine P. Hashemi, K. Balakrishnan, ”DC and RF characterization of InGaAs replacement metal gate (RMG) nFETs on SiGe-OI FinFETs fabricated by 3D monolithic integration”, Solid State Electronics, 128, 87-91 (2017)

    (Partners involved: IBM) Open access pending

  21. H. Hahn, V. Deshpande, E. Caruso, S. Sant, E.O'Connor, Y. Baumgartner, M. Sousa, D. Caimi, A. Olziersky, P. Palestri, L. Selmi, A. Schenk, L. Czornomaz, "A Scaled Replacement Metal Gate InGaAs-on-Insulator n-FinFET on Si with Record Performance", IEEE. Internat. Electron Dev. Meeting 2017, 17.5.1

    (Partners involved: IBM) Open access pending

  22. A. Leuther, M. Ohlrogge, L. Czornomaz, A. Tessmann, F. Bernhardt, T. Merkle, “250 GHz Millimeter Wave Amplifier in 30 nm metamorphic InGaAs MOSFET Technology”, 12th EuMIC 2017 (2017)

    (Partners involved: IAF, IBM) Open access pending

  23. C. Convertino, D. Cutaia, H. Schmid, N. Bologna, P. Paletti, A. M. Ionescu, H. Riel and K. E. Moselund, "Investigation of InAs/GaSb tunnel diodes on SOI", EuroSOI-ULIS 2017 (2017)

    (Partners involved: IBM) Open access pending

  24. H. Schmid, B. Mayer, J. Gooth, S. Wirths, L. Czornomaz, H. Riel, S. Mauthe, C. Convertino, K.E. Moselund, "Monolithic integration of multiple III-V semiconductors on Si", IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conf. (S3S), 2017

    (Partners involved: IBM) Open access pending

  25. L. Ohlsson, F. Lindelöw, C. Zota, M. Ohlrogge, T. Merkle, L.-E. Wernersson, E. Lind, "First InGaAs lateral nanowire MOSFET RF noise measurements and model", 75th DRC (2017)

    (Partners involved: ULUND, IAF) Open access pending

  26. V. Deshpande, H. Hahn, E.O'Connor, Y. Baumgartner, M. Sousa, D. Caimi, H. Boutry, J. Widiez, L. Brévard, C. Le Royer, M. Vinet, J. Fompeyrine, L. Czornomaz (IBM, LETI), "First Demonstration of 3D SRAM Through 3D Monolithic Integration of InGaAs n-FinFETs on FDSOI Si CMOS with Inter-layer Contacts", IEEE 2017 Symp VLSI Techn. (2017)

    (Partners involved: IBM, LETI) Open access pending

  27. M. Hellenbrand, E. Memicevic, M. Berg, O-P Kilpi, J. Svensson, L.-E. Wernersson, "Low-frequency noise in III-V Nanowire TFETs and MOSFETs", IEEE Electron Dev. Lett. vol 38, p. 1520 (2017)

    (Partners involved: ULUND) Open access

  28. O.-P. Kilpi, J. Svensson, L.-E. Wernersson, "Sub-100-nm Gate-Length Scaling of Vertical InAs/InGaAs Nanowire MOSFETs on Si", IEEE Internat. Electron Dev. Meeting 2017, 17.3.1

    (Partners involved: ULUND) Open access pending

  29. V. Deshpande, H. Hahn, V. Djara, E. O'Connor, D. Caimi, M. Sousa, J. Fompeyrine, L. Czornomaz, ”Hybrid InGaAs/SiGe CMOS Circuits with 2D and 3D Monolithic Integration”, ESSDERC 2017, 244-247 (2017)

    (Partners involved: IBM) Open access pending

  30. V. Deshpande, V. Djara, E. O'Connor, P. Hashemi, T. Morf, K. Balakrishnan, D. Caimi, M. Sousa, J. Fompeyrine, L. Czornomaz, "Three-dimensional monolithic integration of III-V and Si(Ge) FETs for hybrid CMOS and beyond", Jap. J. Appl. Phys. vol 56, 04CA05 (2017); doi: 10.7567/JJAP.56.04CA05

    (Partners involved: IBM) Open access

  31. Babadi, A. S.; Svensson, J.; Lind, E.; Wernersson, L.-E. "Impact of Doping and Diameter on the Electrical properties of GaSb Nanowires", Appl. Phys. Lett. vol 110 (5) 053502 (2017); http://dx.doi.org/10.1063/1.4975374

    (Partners involved: Lund University) Open access

  32. Cutaia, D.; Moselund, K.; Schmid, H.; Borg, M.; Riel, H. "Uniting III-V Tunnel FETs with Silicon", Compound Semiconductor, vol 23 (1), 38-42 (2017); 

    (Partners involved: IBM) Open access

  33. Borg, M.; Schmid, H.; Gooth, J.; Rossell, M.D.; Cutaia, D.; Knoedler, M.; Bologna, N.; Moselund, K.E.; Riel, H. "High-Mobility in GaSb Nanostructures Cointegrated with InAs on Si", ACS Nano vol 11 (3) 2553-2560 (2017); doi: 10.1021/acsnano.6b04541

    (Partners involved: IBM) Open access pending

  34. O'Connor, E.; Cherkaoui, K.; Monaghan, S.; Sheehan, B.; Povey, I.M.; Hurley, P.K.; "Inversion in the In0.53Ga0.47As Metal-Oxide-Semiconductor system: impact of the In0.53Ga0.47As doping concentration", Appl. Phys. Lett. vol 110, 032902 (2017); doi: 10.1063/1.4973971

    (Partners involved: Tyndall National Institute) Open access

  35. Zota C.; Wernersson, L.-E.; Lind, E.; "High-Performance Lateral Nanowire InGaAs MOSFET s with Improved On-Current", IEEE Electron Dev. Lett. vol 37, p1264 (2016); doi: 10.1109/LED.2016.2602841

    (Partners involved: Lund University) Open access

  36. Zota, C.; Lindelöw, F.; Wernersson, L.-E.; Lind, E.; "High-frequency InGaAs Tri-gate MOSFETs with fmax of 400 GHz"; Electronics Letters, vol 52, p1869 (2016); doi: 10.1049/el.2016.3108

    (Partners involved: Lund University) Open access

  37. Zota, C.; Lindelöw, F.; Wernersson, L.-E.; Lind, E.; "InGaAs Tri-gate MOSFETs with record on current", IEEE Internat. Dev. Meeting 2016; doi: 10.1109/IEDM.2016.7838336

    (Partners involved: Lund University) Open access

  38. Schmid, H.; Cutaia, D.; Gooth, J.; Wirths, S.; Bologna, N.; Moselund, K.E.; Riel, H.; (2016) "Monolithic integration of multiple III-V semiconductors on Si for MOSFETs and TFETs", IEEE Internat. Dev. Meeting 2016; p. 3.6.1-3.6.4 doi: 10.1109/IEDM.2016.7838340

    (Partners involved: IBM) Open access pending

  39. Deshpande, V.; Djara, V.; Morf, T.; Hashemi, P.; O'Connor, E.; Balakrishnan, K.; Caimi, D.; Sousa, M.; Czornomaz, L.; Fompeyrine, J.; "InGaAs-on-Si (Ge) 3D Monolithic Technology for CMOS and More-than-Moore", 2016 Int. Conf. Solid State Dev. Mater., Ibaraki, Japan, Sep 26-29 (2016).

    (Partners involved: IBM) Open access pending

  40. Millar, D.; Peralagu, U.; Fu, Y.C.; Li, X.; Steer, M.; Thayne, I. (2016); "Initial investigation on the impact of in situ hydrogen plasma exposure to the interface between molecular beam epitaxially grown p-Ga0.7In0.3Sb (100) and thermal atomic layer deposited (ALD) Al2O3", WoDIM 2016, Catanya Italy

    (Partners involved: Glasgow University) Open access

  41. Zota, C.; Lindelöw, F.; Wernersson, L.-E.; Lind, E. (2016), "InGaAs Nanowire MOSFETs with ION = 555 μA/μm at IOFF = 100 nA/μm and VDD = 0.5 V", 2016 IEEE Symp. VLSI Techn. doi: 10.1109/VLSIT.2016.7573418

    (Partners involved: Lund University) Open access

  42. E. Lind, “High-frequency III-V nanowire MOSFETs”, Semicond. Sci. Techn. 31, 9, 093005 (2016)

    (Partners involved: Lund University) Open access pending

  43. Berg, M., Kilpi, O.-P., Persson, K.-M., Svensson, J., Hellenbrand, M., Lind, E. and Wernersson, L.-E. (2016) ‘Electrical characterization and modeling of gate-last vertical InAs Nanowire MOSFETs on Si’, IEEE Electron Device Letters, 37, pp. 966–969. doi: 10.1109/led.2016.2581918.

    (Partners involved: Lund University) Open access

  44. Deshpande, V., Djara, V., O’Connor, E., Caimi, D., Sousa, M., Czornomaz, L., Fompeyrine, J., Hashemi, P. and Balakrishnan, K. (2016) ‘First RF characterization of InGaAs replacement metal gate (RMG) nFETs on SiGe-OI FinFETs fabricated by 3D monolithic integration’, 2016 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon (EUROSOI-ULIS), . doi: 10.1109/ulis.2016.7440069.

    (Partners involved:IBM) Open access pending

  45. M. Berg, K. M. Persson, O. P. Kilpi, J. Svensson, E. Lind and L. E. Wernersson, "Self-aligned, gate-last process for vertical InAs nanowire MOSFETs on Si," 2015 IEEE International Electron Devices Meeting (IEDM), Washington, DC, 2015, pp. 31.2.1-31.2.4. doi: 10.1109/IEDM.2015.7409806

    (Partners involved: Lund University) Open access

  46. C. B. Zota, L. E. Wernersson and E. Lind, "Single suspended InGaAs nanowire MOSFETs," 2015 IEEE International Electron Devices Meeting (IEDM), Washington, DC, 2015, pp. 31.4.1-31.4.4. doi: 10.1109/IEDM.2015.7409808

    (Partners involved: Lund University) Open access

 

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